Field of the Invention
The present invention relates to a semiconductor device, and particularly to a semiconductor device having a transistor that might undergo BTI (Bias Temperature Instability) deterioration.
Description of Related Art
As for MOS transistors that are frequently used in semiconductor devices such as DRAM (Dynamic Random Access Memory), a kind of aging deterioration called BTI deterioration is known to occur. The BTI deterioration makes a threshold voltage of a transistor rise gradually when the transistor continues to be ON, thereby entailing a decrease in drain current. A transistor in which the BTI deterioration occurs causes trouble such as a disturbance in the duty of passing signals. The BTI deterioration can occur both in P-channel MOS transistors and N-channel MOS transistors. The former is known as NBTI (Negative BTI) deterioration, and the latter as PBTI (Positive BTI) deterioration.
Japanese Patent Application Laid-Open No. 2007-323770 discloses the invention for suppressing the occurrence of BTI deterioration of MOS transistors that make up memory cells of SRAM (Static Random Access Memory).
Usually, on transmission paths of various control signals, internal circuits, such as inverter circuits responsible for buffering or delaying of signals, that contain a plurality of transistors are provided. The transistors in such internal circuits might remain turned ON for a long time if the logic state of corresponding control signals is fixed for a long time. This might cause the above-described BTI deterioration in the transistors of the internal circuits. Therefore, improvement is required.